FHG_USB

Purpose

The FHG_USB is an USB function core with an 8/16/32-bit microprocessor interface. It is fully compliant with USB 1.1 specification. Its parameter set enables the designer to enhance the USB interface and to tailor it to the applications needs.

Features

• Synthesizable USB function core compliant to USB specification 1.1
• 8/16/32-bit microprocessor interface
• Scalable number of endpoints (max. 15 IN / 15 OUT plus bidirectional control endpoint 0)
• Supports all transfer types (control, interrupt, bulk and iso) with a scalable fifo size up to 1023 bytes
• Suspend/resume/remote wakeup support
• Programmable interrupt output to microcontroller
• Technology independent (FPGA and ASIC)
• Silicon proven in several projects
• Hub-Repeater extension on request

Documentation

Please ask for details.

Design Kit

• Technology independent implementation as Synopsys Design Ware component
• VHDL precompiled simulation models
• VHDL/Verilog USB 1.1 compliance test suite
• Synthesis scripts
• Other tool support on request

Design Support, Netlist Synthesis Service and Consulting available.

Requirements

• Simulation
  • VHDL IEEE-1076 Simulator
  • Verilog IEEE-1364 Simulator, netlist only
• Synthesis
  • Synopsys Design Compiler

Terms & Conditions

Details