FHG_SAFECOM

Purpose

The FHG_SAFECOM is an easy to use pair of serial encoder and decoder modules for reliable serial data transmission. A powerful 40 bit checksum allows the detection of most bit errors, discarding corrupted messages before the falsified information is further processed. For typical configuration and message lengths, the requirements of the highest integrity class I3 defined in IEC 870-5-1 are met.

Features

• Serial encoder module, including SYNC word generator, checksum calculation and insertion, scrambler.
• Serial decoder module, including SYNC word detection and locking, descrambler, information and checksum validation, "message valid" indication
• Powerful error detection capability
• Residual error rate less than 10^-12 for messages indicated "valid"
• Build-in scrambler
• Configurable message length
• Configurable SYNC word pattern and length
• Detailed fault statistics available, including calculations to demonstrate compliance to IEC 870-5-1, integrity class I3
• Technology independent (FPGA and ASIC)

Documentation

Please ask for details.

Design Kit

• Technology Independent Implementation as Synopsys Design Ware Components
• VHDL/Verilog Simulation Models
• Test Suite
• Synthesis and Testsynthesis Scripts

Design Support, Netlist Synthesis Service and Consulting available.

Requirements

• Simulation
  • VHDL IEEE-1076 Simulator
  • Verilog IEEE-1364 Simulator, netlist only
• Synthesis
  • Synopsys Design Compiler

Terms & Conditions

Details