FHG_FFT Processor

Purpose

The CorePool component FHG_FFT computes a parameterizable and synthesizable Fast Fourier Transformation radix-2 algorithm. The tunable parameters are the number of values of the FFT (must be a power of 2), the wordlength of the complex input data, the wordlength of the sine and cosine coefficients.

Features

• Fully Parameterized Fast Fourier Transformation
• Fully synchronous design
• Fully synthesizable
• FFT order parameterized
• Wordlength of complex input data parameterized
• Wordlength of the sine and cosine coefficients parameterized
• Registered Inputs and Outputs
• Input and Output data in Two's complement Format
• Technology independent (FPGA and ASIC)

Documentation

For download: FHG_FFT documentation (Adobe® Acrobat v3.0 PDF file) 90 kB

If you don't have Adobe® Acrobat Reader you can download it.

Design Kit

• Technology Independent Implementation as Synopsys Design Ware Component
• VHDL Simulation Model
• VHDL Compliance Test Suite
• Auxiliary Simulation Models for User Testbenches
• Synthesis and Testsynthesis Scripts

Design Support, Netlist Synthesis Service and Consulting available.

Requirements

• Simulation
  • VHDL IEEE-1076 Simulator
• Synthesis
  • Synopsys Design Compiler

References

For more details about the FHG_FFT refer to standard literature about the fast Fourier Transformation Algorithm.

Terms & Conditions

Details