About CorePool

CorePool covers core components for ASIC and FPGA solutions. The cores are developed by Fraunhofer Institute for Integrated Circuits (Fraunhofer IIS) in Erlangen/Germany, and by selected partners. Many years of know-how, experience, and the needs of our customers have influenced the methodology to develop these cores. Fraunhofer IIS also offers training on System C and VHDL design.

Each core has been verified with sophisticated test procedures at Fraunhofer IIS before it is offered to the customer. As a result, CorePool cores are of high quality and proven technology. Each CorePool component is parameterizable and allows the designer to tailor each component to the needs of his application. Therefore, using CorePool components saves lots of design and verification effort.

To support your design productivity we offer a free Design Kit including:

FREE Simulation Model
FREE Trial Synthesis Model
FREE Verification Suite
FREE Design Support Model as applicable